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IL500-Series Isolators
Notes (apply to both 3.3 V and 5 V specifications):
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9.
Absolute maximum means the device will not be damaged if operated under these conditions. It does not guarantee performance.
PWD is defined as |t PHL ? t PLH |. %PWD is equal to PWD divided by pulse width.
t PSK is the magnitude of the worst-case difference in t PHL and/or t PLH between devices at 25°C.
CM H is the maximum common mode voltage slew rate that can be sustained while maintaining V O > 0.8 V DD 2 . CM L is the maximum
common mode input voltage that can be sustained while maintaining V O < 0.8 V. The common mode voltage slew rates apply to both rising
and falling common mode voltage edges.
Device is considered a two terminal device: pins on each side of the package are shorted.
Dynamic power consumption is calculated per channel and is supplied by the channel’s input side power supply.
Minimum pulse width is the minimum value at which specified PWD is guaranteed.
The relevant test and measurement methods are given in the Electromagnetic Compatibility section on p. 9.
External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than to “pin-to-pin” (see diagram on p. 9).
10. If internal clock is used, devices will respond to DC states on inputs within a maximum of 9 μs. Outputs may oscillate if the SYNC input slew
rate is less than 1 V/ms.
11. t off is the maximum time for the internal refresh clock to shut down.
9
NVE Corporation
11409 Valley View Road, Eden Prairie, MN 55344-3617
Phone: (952) 829-9217
Fax: (952) 829-9189
www.IsoLoop.com
?NVE Corporation
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